The present disclosure relates to multi-chip packages, and more specifically a multi-chip package including an interposer that allows efficient testing of integrated circuits (IC) disposed thereon.
A common trend in modern electronics is for each new generation of devices to become increasingly smaller and lighter. One of the technologies used to meet these requirements is multi-chip packaging. A multiple chip-package or multi-chip module is an electronic package where multiple ICs or discrete components are packaged together on a unifying interposer. A multi-chip package has the advantage of integrating several different functions into a single, dense, space-saving package.
Multi-chip packages and their components may be tested at various stages in the manufacturing process to ensure proper functionality. For example. ICs may be tested by their vendors before they are attached to a multi-chip package to improve package yield. Additionally, heat stress during package assembly may introduce additional failures even if the ICs are known good parts. Thus multi-chip packages may also be tested after assembly of the package to identify failing parts. Testing can range from simple contact tests verifying that an IC is correctly attached to the interposer and that the chip I/O is functional to complex test patterns verifying full functionality of an IC (e.g., full memory array test of a memory chip). The contact tests for verifying proper connectivity become increasingly important for ICs that have a wide I/O interface.